Author - Jitesh Shah

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Jitesh Shah	Write for Electronic Design
Jitesh Shah, advanced packaging engineer within the Package Design Group at Integrated Device Technology, holds a bachelor of engineering degree in polymer engineering from the University of Pune, India, and a master of science degree in industrial engineering from SUNY, Binghamton. Email address: Jitesh.Shah@idt.com Web site: http://www.idt.com
1 results found for Jitesh Shah, displaying items 1 - 1

July 24, 2008 [Design View / Design Solution]
Floorplanning A Power Delivery Network With Spice
Greater system complexity and ever-higher clock speeds continue to push IC power consumption to the limit. And though every generation escalates the demand on IC current, voltage levels drop due to steadily declining feature sizes on the silicon. Those lower voltage levels cause the power-supply noise margin (typically 5% from nominal) to shrink across the chips’ power-supply terminals. A noise level of 250 mV might be acceptable for a 5-V power...