Paul Howard, P.E.
Write for Electronic Design
Paul Howard, P.E., a senior design engineer and team leader at Texas Instruments holds a BS in Electrical Engineering from Baylor University and an MS in Computer Science from the University of Texas at Dallas. Paul can be emailed at phoward@ti.com.
Email address: phoward@ti.com
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March 5, 2008   [Design View / Design Solution]
Verify SoCs Faster And More Predictably With SystemVerilog And Constrained-Random Stimuli
Verifying the integration and operation of new IP in a legacy system-on-a-chip (SoC) becomes challenging. This is true particularly when the legacy SoC environment was built using a directed test methodology and validation of new IP requires corner case stimulus to achieve required functional coverage.










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