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[Embedded in Electronic Design]
Multicore And More

William Wong  |   ED Online ID #19231  |   July 10, 2008


Freescale’s QorIQ series builds on the venerable PowerQUICC lines. PowerQUICC will remain, but the QorIQ is where the power is. The P4 series starts with the eight-core P4080, which uses Freescale’s CoreNET on-chip interconnect to deliver high performance while keeping power requirements low (see the figure). The one- and two-core P1 series offers even lower requirements.

Multicore silicon-on-insulator (SOI) designs place more demands on programmers at 45 nm. But with QorIQ, they will get more powerful tools. A pair of serializer/deserializers (SERDES) utilizing the Aurora protocol can stream debugging and trace information offchip at rates on par with the other highspeed serial interfaces on the chip.

Serial interfaces are the norm for QorIQ, with choices of PCI Express, Serial RapidIO, XAUI, and a range of Ethernet interfaces. Developers can configure various combinations to meet design requirements.

The pattern-matching and encryption/ security engines can run at 10G speeds. This is critical for communication applications where the chips will find a home.

Developers will get an early look at the chips via Virtutech Simics (see “Simulate Multicore Systems Before Silicon” at www.electronicdesign.com, ED Online 16136). The approach is also great for debugging.

FREESCALE
www.freescale.com


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